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SH7763 Datasheet, PDF (63/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Table 31.6
Table 31.7
Table 31.8
Correspondence between Command Response Byte Number and RSPR........... 1286
List of Chattering Elimination Pulse Cycles....................................................... 1311
MMCIF Interrupt Sources................................................................................... 1343
Section 32 PC Card Controller (PCC)
Table 32.1 Features of the PCMCIA Interface ..................................................................... 1347
Table 32.2 PCC Pin Configuration ....................................................................................... 1350
Table 32.3 Register Configuration........................................................................................ 1351
Table 32.4 Register State in Each Operating Mode .............................................................. 1351
Table 32.5 PCMCIA Support Interface ................................................................................ 1367
Section 33 Audio Codec Interface (HAC)
Table 33.1 Pin Configuration................................................................................................ 1378
Table 33.2 Register Configuration........................................................................................ 1379
Table 33.3 Register State in Each Operating Mode .............................................................. 1379
Table 33.4 AC97 Transmit Frame Structure......................................................................... 1395
Table 33.5 AC97 Receive Frame Structure .......................................................................... 1396
Section 34 Serial Sound Interface (SSI)
Table 34.1 Pin Configuration.................................................................................................... 81
Table 34.2 Register Configuration............................................................................................ 82
Table 34.3 Register State in Each Operating Mode .................................................................. 83
Table 34.4 Bus Formats of SSI Module.................................................................................... 97
Table 34.5 Number of Padding Bits for Each Valid Configuration........................................ 101
Section 35 USB Host Controller (USBH)
Table 35.1 USB Host Pin Assignment.................................................................................. 1445
Table 35.2 Register Configuration........................................................................................ 1446
Table 35.3 Register State in Each Operating Mode .............................................................. 1447
Section 36 USB Function Controller (USBF)
Table 36.1 Pin Configuration and Functions ............................................................................ 81
Table 36.2 (1) Register Configuration (Access Size = 8 bits) ................................................ 82
Table 36.2 (2) Register Configuration (Access Size = 32 bits) .............................................. 84
Table 36.3 Register State in Each Operating Mode .................................................................. 86
Table 36.4 Restrictions of Settable Values ............................................................................. 137
Table 36.5 Example of Endpoint Configuration ..................................................................... 137
Table 36.6 Example of Setting of Endpoint Configuration Information................................. 138
Table 36.7 Command Decoding on Application Side............................................................. 160
Section 37 LCD Controller (LCDC)
Table 37.1 Pin Configuration.................................................................................................... 81
Table 37.2 Register Configuration............................................................................................ 82
Rev. 1.00 Oct. 01, 2007 Page lxiii of lxvi