SH7763 Datasheet, PDF (1229/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 28 Serial Communication Interface with FIFO/IrDA Interface (SCIF/IrDA)
Error handling
No
ORER = 1?
Yes
Overrun error handling
[1] Whether a framing error or parity error has occurred in
the receive data that is to be read from SCFRDR can be
ascertained from the FER and PER bits in SCFSR.
No
ER = 1?
Yes
Receive error handling
No
BRK = 1?
Yes
Break handling
No
DR = 1?
Yes
Read receive data in SCFRDR
Clear DR, ER, BRK flags
in SCFSR,
and ORER flag in SCLSR, to 0
End
Figure 28.10 Sample Serial Reception Flowchart (2)
Rev. 1.00 Oct. 01, 2007 Page 1163 of 1956
REJ09B0256-0100