SH7763 Datasheet, PDF (1693/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 37 LCD Controller (LCDC)
Image for Display in
Memory
(X-Resolution × Y-
Resolution)
LCD Module
(X-Resolution × Number of Colors for
Y-Resolution) Display
Number of
Column
Address Bits of Burst Length of
SDRAM
LCDC (LDSMR*)
64 × 128
128 × 64
Monochrome 1 bpp
9 bits

10 bits

2 bpp
9 bits

10 bits

4 bpp
9 bits

(packed) _{10 bits}

4 bpp
9 bits

(unpacked) _{10 bits}

6 bpp
9 bits

10 bits

Color
4 bpp
9 bits

(packed) 10 bits

4 bpp
9 bits

(unpacked) 10 bits

8 bpp
9 bits

10 bits

Note: * Specify the data of the number of line specified as burst length can be stored in address
of SDRAM same as that of ROM.
Rev. 1.00 Oct. 01, 2007 Page 1627 of 1956
REJ09B0256-0100