SH7763 Datasheet, PDF (133/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 3 Instruction Set
Instruction
Operation
Instruction Code
Privileged T Bit New
MOV.W @(R0,Rm),Rn (R0 + Rm) →
sign extension → Rn
0000nnnnmmmm1101 —
——
MOV.L @(R0,Rm),Rn (R0 + Rm) → Rn
0000nnnnmmmm1110 —
——
MOV.B R0,@(disp*,GBR) R0 → (disp + GBR)
11000000dddddddd —
——
MOV.W R0,@(disp*,GBR) R0 → (disp × 2 + GBR)
11000001dddddddd —
——
MOV.L R0,@(disp*,GBR) R0 → (disp × 4 + GBR)
11000010dddddddd —
——
MOV.B @(disp*,GBR),R0 (disp + GBR) →
sign extension → R0
11000100dddddddd —
——
MOV.W @(disp*,GBR),R0 (disp × 2 + GBR) →
sign extension → R0
11000101dddddddd —
——
MOV.L @(disp*,GBR),R0 (disp × 4 + GBR) → R0
11000110dddddddd —
——
MOVA
@(disp*,PC),R disp × 4 +
0
PC & H'FFFF FFFC
+ 4 → R0
11000111dddddddd —
——
MOVCO. R0,@Rn
L
LDST → T
If (T == 1) R0 → (Rn)
0 → LDST
0000nnnn01110011 
LDST New
MOVLI.L @Rm,R0
1 → LDST
(Rm) → R0
When interrupt/exception
occurred 0 → LDST
0000mmmm01100011 
 New
MOVUA.L @Rm,R0
(Rm) → R0
0100mmmm10101001 
Load non-boundary alignment
data
 New
MOVUA.L @Rm+,R0
(Rm) → R0, Rm + 4 → Rm
0100mmmm11101001 
Load non-boundary alignment data
 New
MOVT Rn
T → Rn
0000nnnn00101001 —
——
SWAP.B Rm,Rn
Rm → swap lower 2 bytes
→ Rn
0110nnnnmmmm1000 —
——
SWAP.W Rm,Rn
Rm → swap upper/lower
words → Rn
0110nnnnmmmm1001 —
——
XTRCT Rm,Rn
Rm:Rn middle 32 bits → Rn 0010nnnnmmmm1101 —
——
Note: * The assembler of Renesas uses the value after scaling (×1, ×2, or ×4) as the
displacement (disp).
Rev. 1.00 Oct. 01, 2007 Page 67 of 1956
REJ09B0256-0100