SH7763 Datasheet, PDF (1059/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

23.6 Usage Notes
Section 23 Gigabit Ethernet Controller (GETHER)
23.6.1 Checksum Calculation of Ethernet Frames
This LSI is capable of calculating the checksum data of the received frames. Only the data fields
of the Ethernet frames are subject to calculation. Specifically, a data field follows the length/type
field and is followed by the CRC field. Calculation involves 16-bit addition only; it does not
involve bit reversal.
Note: Also for the frames with VLANTag inserted, the 15th byte from the top and the following
bytes before the CRC field are subject to calculation.
Destination address
(6 bytes)
Source address
(6 bytes)
Type (2 bytes)
Data (46 to 1500 bytes)
Data subject to
checksum
calculation
Destination address
(6 bytes)
Source address
(6 bytes)
VLANtag
(4 bytes)
Type (2 bytes)
Data (60 bytes)
Data subject to
checksum
calculation
CRC (4 bytes)
CRC (4 bytes)
Schematic of an Ethernet frame
(without VLANtag)
Schematic of an Ethernet frame
(with VLANtag)
Figure 23.38 Data Subject to Checksum Calculation
23.6.2 Notes on TSU Use
The TSU of this LSI supports up to 100BASE-T data transfers. Therefore, even when The TSU of
this LSI is used with 1000BASE-T, the transfer performance is equal to that with 100BASE-T.
Rev. 1.00 Oct. 01, 2007 Page 993 of 1956
REJ09B0256-0100