SH7763 Datasheet, PDF (276/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 7 Caches
3. OC address array write (associative)
When a write is performed with the A bit in the address field set to 1, the tag in each way
stored in the entry specified in the address field is compared with the tag specified in the data
field. The way numbers of bits [14:13] in the address field are not used. If the MMU is enabled
at this time, comparison is performed after the virtual address specified by data field bits
[31:10] has been translated to a physical address using the UTLB. If the addresses match and
the V bit in the way is 1, the U bit and V bit specified in the data field are written into the OC
entry. In other cases, no operation is performed. This operation is used to invalidate a specific
OC entry. If the OC entry U bit is 1, and 0 is written to the V bit or to the U bit, write-back is
performed. If a UTLB miss occurs during address translation, or the comparison shows a
mismatch, an exception is not generated, no operation is performed, and the write is not
executed.
Note: This function may not be supported in the future SuperH Series. Therefore, it is
recommended that the OCBI, OCBP, or OCBWB instruction should be used to operate the
OC definitely by reporting data TLB miss exception.
31
24 23
15 141312
Address field _{1 1 1 1 0 1 0 0 * * * * * * * * *}
31
Data field
Way
Tag
Entry
10 9
V : Validity bit
U : Dirty bit
A : Association bit
: Reserved bits (write value should be 0 and read value is undefined )
* ^{: Don't care}
543210
0 A0 0 0
210
UV
Figure 7.7 Memory-Mapped OC Address Array
7.6.4 OC Data Array
The OC data array is allocated to addresses H'F500 0000 to H'F5FF FFFF in the P4 area. A data
array access requires a 32-bit address field specification (when reading or writing) and a 32-bit
data field specification. The way and entry to be accessed are specified in the address field, and
the longword data to be written is specified in the data field.
In the address field, bits [31:24] have the value H'F5 indicating the OC data array, and the way is
specified by bits [14:13] and the entry by bits [12:5]. Address field bits [4:2] are used for the
longword data specification in the entry. As only longword access is used, 0 should be specified
for address field bits [1:0].
Rev. 1.00 Oct. 01, 2007 Page 210 of 1956
REJ09B0256-0100