SH7763 Datasheet, PDF (1489/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 34 Serial Sound Interface (SSI)
Table 34.3 Register State in Each Operating Mode
Channel Register Name
Power-On
Abbreviation Reset
Manual Reset Sleep
Standby
0
Control register 0
SSICR0 H'0000 0000 H'0000 0000 Retained Retained
Status register 0
SSISR0 H'0010 A003 H'0x10 A00x Retained Retained
Transmit data register 0 SSITDR0 H'0000 0000 H'0000 0000 Retained Retained
Receive data register 0 SSIRDR0 H'0000 0000 H'0000 0000 Retained Retained
1
Control register 1
SSICR1 H'0000 0000 H'0000 0000 Retained Retained
Status register 1
SSISR1 H'0010 A003 H'0x10 A00x Retained Retained
Transmit data register 1 SSITDR1 H'0000 0000 H'0000 0000 Retained Retained
Receive data register 1 SSIRDR1 H'0000 0000 H'0000 0000 Retained Retained
2
Control register 2
SSICR2 H'0000 0000 H'0000 0000 Retained Retained
Status register 2
SSISR2 H'0010 A003 H'0x10 A00x Retained Retained
Transmit data register 2 SSITDR2 H'0000 0000 H'0000 0000 Retained Retained
Receive data register 2 SSIRDR2 H'0000 0000 H'0000 0000 Retained Retained
3
Control register 3
SSICR3 H'0000 0000 H'0000 0000 Retained Retained
Status register 3
SSISR3 H'0010 A003 H'0x10 A00x Retained Retained
Transmit data register 3 SSITDR3 H'0000 0000 H'0000 0000 Retained Retained
Receive data register 3 SSIRDR3 H'0000 0000 H'0000 0000 Retained Retained
Rev. 1.00 Oct. 01, 2007 Page 1423 of 1956
REJ09B0256-0100