SH7763 Datasheet, PDF (1822/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 40 General Purpose I/O (GPIO)
Bit
11
10, 9
8
7
6
Initial
Bit Name value R/W Description
PTSEL4B 0
R/W Selects the pins for ST0_D0 to ST0_D07, ST0_START,
ST0_VALID, and ST0_CLK.
0: Inputs from PTL5 to PTL7 and PTM0 to PTM7 are
used as ST0_D0 to ST0_D07, ST0_START,
ST0_VALID, and ST0_CLK, respectively
1: Inputs from PTJ1 to PTJ7, PTI2, PTI3, PTI6, and
PTI7 are used as ST0_D0 to ST0_D07,
ST0_START, ST0_VALID, and ST0_CLK,
respectively
PTSEL4 All 0 R/W These bits select the pin for MDIO0.
[10:9]
00: Input from PTL3 is used as ET0_ MDIO (only PTL3
can be used when using GMII0 and MII0)
01: Input from PTI1 is used as RMII0_ MDIO
10: Input from PTM0 is used as RMII0_ MDIO
11: Input from PTO3 is used as RMII0_ MDIO
PTSEL48 0
R/W Selects the pin for MDIO1.
0: Input from PTF2 is used as ET1_ MDIO (only PTF2
can be used when using GMII1 and MII1)
1: Input from PTO1 is used as ET1_ MDIO

0
R
Reserved
This bit is always read as 0, and the write value should
always be 0.
PTSEL46 0
R/W Selects the pins for RMII1_RX_ER, RMII1_CRS_DV,
RMII1_RXD1, and RMII1_RXD0.
0: Inputs from PTJ1 and PTJ3 to PTJ5 are used as
RMII1_RX_ER, RMII1_CRS_DV, RMII1_RXD1, and
RMII1_RXD0, respectively
1: Inputs from PTH0, PTH1, PTH3, and PTH4 are used
as RMII1_RX_ER, RMII1_CRS_DV, RMII1_RXD1,
and RMII1_RXD0, respectively
Rev. 1.00 Oct. 01, 2007 Page 1756 of 1956
REJ09B0256-0100