SH7763 Datasheet, PDF (872/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
Name
Power-On Manual
Abbreviation Reset
Reset
Sleep
Standby
E-DMAC transmit request register EDTRR1 H'00000000 H'00000000 Retained Retained
E-DMAC receive request register
EDRRR1 H'00000000 H'00000000 Retained Retained
Transmit descriptor list start address TDLAR1
register
H'00000000 H'00000000 Retained Retained
Receive descriptor list start address RDLAR1
register
H'00000000 H'00000000 Retained Retained
E-MAC/E-DMAC status register
EESR1
H'00000000 H'00000000 Retained Retained
E-MAC/E-DMAC status interrupt
permission register
EESIPR1 H'00000000 H'00000000 Retained Retained
Transmit/receive status copy enable TRSCER1 H'00000000 H'00000000 Retained Retained
register
Receive missed-frame counter
register
RMFCR1 H'00000000 H'00000000 Retained Retained
Transmit FIFO threshold register
TFTR1
H'00000000 H'00000000 Retained Retained
FIFO depth register
FDR1
H'00000000 H'00000000 Retained Retained
Receiving method control register RMCR1 H'00000000 H'00000000 Retained Retained
Receive descriptor fetch address
register
RDFAR1 H'00000000 H'00000000 Retained Retained
Receive descriptor finished address RDFXR1
register
H'00000000 H'00000000 Retained Retained
Receive descriptor final flag register RDFFR1 H'00000000 H'00000000 Retained Retained
Transmit descriptor fetch address
register
TDFAR1 H'00000000 H'00000000 Retained Retained
Transmit descriptor finished address TDFXR1
register
H'00000000 H'00000000 Retained Retained
Transmit descriptor final flag register TDFFR1 H'00000000 H'00000000 Retained Retained
Overflow alert FIFO threshold register FCFTR1 H'001F00FF H'001F00FF Retained Retained
Receive data padding insert register RPADIR1 H'00000000 H'00000000 Retained Retained
Rev. 1.00 Oct. 01, 2007 Page 806 of 1956
REJ09B0256-0100