SH7763 Datasheet, PDF (740/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Power-Down Mode
Initial
Bit
Bit Name Value R/W Description
28
STIF1
0
R/W STIF1 Module Stop Bit
When set to 1, the clock supply to the STIF1 module is
halted.
0: STIF1 operates
1: Clock supply to STIF1 is halted
27
STIF0
0
R/W STIF0 Module Stop Bit
When set to 1, the clock supply to the STIF0 module is
halted.
0: STIF0 operates
1: Clock supply to STIF0 is halted
26
SSI3
0
R/W SSI3 Module Stop Bit
When set to 1, the clock supply to the SSI3 module is
halted.
0: SSI3operates
1: Clock supply to SSI3 is halted
25
SSI2
0
R/W SSI2 Module Stop Bit
When set to 1, the clock supply to the SSI2 module is
halted.
0: SSI2 operates
1: Clock supply to SSI2 is halted
24
SSI1
0
R/W SSI1 Module Stop Bit
When set to 1, the clock supply to the SSI1 module is
halted.
0: SSI1 operates
1: Clock supply to SSI1 is halted
23
SSI0
0
R/W SSI0 Module Stop Bit
When set to 1, the clock supply to the SSI0 module is
halted.
0: SSI0 operates
1: Clock supply to SSI0 is halted
Rev. 1.00 Oct. 01, 2007 Page 674 of 1956
REJ09B0256-0100