SH7763 Datasheet, PDF (1289/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 29 Serial I/O with FIFO (SIOF)
(a) 16-bit stereo data
31
24 23
16 15
87
0
L-channel data
R-channel data
(b) 16-bit monaural data
31
24 23
16 15
87
0
Data
(c) 8-bit monaural data
31
24 23
16 15
87
0
Data
(d) 16-bit stereo data (left and right same audio output) data
31
24 23
16 15
87
0
Data
Figure 29.5 Transmit/Receive Data Bit Alignment
Note: In the figure, only the shaded areas are transmitted or received as valid data. Therefore,
access must be made in byte units for 8-bit data, and in word units for 16-bit data. Data in
unshaded areas is not transmitted or received.
Monaural or stereo can be specified for transmit data by the TDLE bit and TDRE bit in SITDAR.
Monaural or stereo can be specified for receive data by the RDLE bit and RDRE bit in SIRDAR.
To achieve left and right same audio output while stereo is specified for transmit data, specify the
TLREP bit in SITDAR. Table 29.8 and table 29.9 show the audio mode specification for transmit
data and that for receive data, respectively.
Table 29.8 Audio Mode Specification for Transmit Data
Mode
Monaural
Stereo
Left and right same audio output
Note: x: Don't care
TDLE
1
1
1
Bit
TDRE
0
1
1
TLREP
x
0
1
Rev. 1.00 Oct. 01, 2007 Page 1223 of 1956
REJ09B0256-0100