SH7763 Datasheet, PDF (1550/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 35 USB Host Controller (USBH)
35.3.21 HcRhStatus Register (USBHRS)
This register is reset by the UsbReset state.
Bit : 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CRWE — — — — — — — — — — — — — OCIC LPSC
Initial value : -
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W : W R R R R R R R R R R R R R R/W R/W
Bit : 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
DRWE — — — — — — — — — — — — — OCI LPS
Initial value : 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W : R/W R R R R R R R R R R R R R R R/W
Bit
Bit Name Initial value
31
CRWE 
30 to 18 
All 0
17
OCIC
0
16
LPSC
0
15
DRWE 0
R/W Description
W (write) ClearRemoteWakeupEnable
Writing 1 to this bit clears
DeviceRemoteWakeupEnable bit. Writing 0 has no
effect
R Reserved
These bits are always read as 0. The write value
should always be 0.
R/W OverCurrentIndicatorChange
This bit is set when OverCurrentIndicator changes.
Writing 1 clears this bit. Writing 0 has no effect.
R/W (read) LocalPowerStatusChange
Not supported by this LSI. The read value should
always be 0.
(write) SetGlobalPower
Write 1 issues a SetGlobalPower command to the
ports. Writing 0 has no effect.
R/W (read) DeviceRemoteWakeupEnable
This bit enables ports' ConnectStatusChange as a
remote wakeup event.
0: disabled
1: enabled
(write) SetRemoteWakeupEnable
Writing 1 sets DeviceRemoteWakeupEnable bit.
Writing 0 has no effect.
Rev. 1.00 Oct. 01, 2007 Page 1484 of 1956
REJ09B0256-0100