SH7763 Datasheet, PDF (1360/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 31 Multimedia Card Interface (MMCIF)
Initial
Bit
Bit Name Value R/W Description
4
RTY4
0
R/W Specifies that the command response CRC (other than
an R2 response) be checked through CRC7. Bits RTY2
to RTY0 should be set to 100.
3

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
2 to 0 RTY[2:0] 000
R/W These bits specify the number of command response
bytes.
000: A command requiring no command responses.
001: Setting prohibited.
010: Setting prohibited.
011: Setting prohibited.
100: A command requiring 6-byte command response.
Specified by R1, R1b, R3, R4, and R5 responses
in MMC mode.
101: A command requiring a 17-byte command
response.
Specified by the R2 response in MMC mode.
110: Setting prohibited
111: Setting prohibited
Note: The purpose of a CRC check through RTY4 is to check the CRC that is attached to a
command response, not to check the bit in the event of a CRC error regarding a command
response. A CRC check for an R2 command response in MMC mode cannot be performed.
Rev. 1.00 Oct. 01, 2007 Page 1294 of 1956
REJ09B0256-0100