SH7763 Datasheet, PDF (1378/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 31 Multimedia Card Interface (MMCIF)
Initial
Bit
Bit Name Value R/W Description
0
CTERIE 0
R/W Command Timeout Error Flag Enable
0: Disables command timeout error flag setting.
1: Enables command timeout error flag setting.
31.3.13 Interrupt Status Registers 0 and 1 (INTSTR0, INTSTR1)
The INTSTR registers control MMCIF interrupts.
• INTSTR0
Bit: 7
6
5
4
3
2
1
0
FEI FFI DRPI DTI CRPI CMDI DBSYI BTI
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
Initial
Bit
Bit Name Value R/W Description
Interrupt
output
7
FEI
0
R/(W)* FIFO Empty Flag
FSTAT
[Setting 1 condition]
When FIFO becomes empty while FEIE =
1 and write data is being transmitted
(when the FIFO_EMPTY bit in CSTR is
set)
[Clearing 0 condition]
Write 0 after reading FEI = 1.
6
FFI
0
R/(W)* FIFO Full Flag
FSTAT
[Setting 1 condition]
When FIFO becomes full while FFIE = 1
and read data is being received
(when the FIFO_FULL bit in CSTR is set)
[Clearing 0 condition]
Write 0 after reading FFI = 1.
Rev. 1.00 Oct. 01, 2007 Page 1312 of 1956
REJ09B0256-0100