SH7763 Datasheet, PDF (1545/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 35 USB Host Controller (USBH)
35.3.18 HcLSThreshold Register (USBHLST) (Not supporting LowSpeed mode)
Bit : 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value : 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W : R R R R R R R R R R R R R R R R
Bit : 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
————
LST[11:0]
Initial value : 0
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
R/W : R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
31 to 12
11 to 0
Bit Name

LST
Initial Value R/W
All 0
R
H'628
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0
LSThreshold
These bits are a value used by the Frame
manager to determine whether or not a low speed
transaction can be started in the current frame.
Rev. 1.00 Oct. 01, 2007 Page 1479 of 1956
REJ09B0256-0100