SH7763 Datasheet, PDF (592/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
(28) PCI PIO Data Register (PCIPDR)
When accessed, this register will cause the generation of a configuration cycle on the PCI bus.
Refer to section 13.4.5 (2), Configuration Space Access.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PDR
Initial value: — — — — — — — — — — — — — — — —
SH R/W: _R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
PCI R/W: — — — — — — — — — — — — — — — —
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PDR
Initial value: — — — — — — — — — — — — — — — —
SH R/W: _R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
PCI R/W: — — — — — — — — — — — — — — — —
Bit
31 to 0
Bit Name
PDR
Initial
Value R/W
Description
Undefined SH: R/W PCI PIO Data Register
PCI:  A read from or write to this register will cause a PCI
configuration cycle on the PCI bus.
Rev. 1.00 Oct. 01, 2007 Page 526 of 1956
REJ09B0256-0100