SH7763 Datasheet, PDF (960/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
23.3.59 Receive Frame Counter Register (Port 0) (Normal and Erroneous Reception)
(RXALCR0)
RXALCR0 is a 32-bit counter indicating the number of frames received in the E-MAC-0,
including the number of frames erroneously received. When the value in this register reaches
H'FFFFFFFF, count-up is halted. The counter is cleared to 0 by reading from this register. This
register cannot be written to.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RC0[31:16]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RC0[15:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit
Bit Name
31 to 0 RC0[31:0]
Initial
Value
All 0
R/W Description
R Port 0 Receive Frame Counter Bits
These bits indicate the number of frames successfully
received and erroneously received.
Rev. 1.00 Oct. 01, 2007 Page 894 of 1956
REJ09B0256-0100