SH7763 Datasheet, PDF (365/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 9 Interrupt Controller (INTC)
Interrupt Source
INTEVT Interrupt MASK/CLEAR
Code Priority Register
Interrupt
Source
Register
Detail
Source
Register
IRL
IRL[7:4] = HHLL H'380 3
INTMSK2[3]
—
—
L: Low
(H'C)
INTMSKCLR2[3]
level
input
H: High
IRL[3:0] = HHLL
(H'C)
INTMSK2[19]
—
—
INTMSKCLR2[19]
level
IRL[7:4] = HHLH H'3A0 2
INTMSK2[2]
—
—
input ^(H'D)
INTMSKCLR2[2]
(See
table
9.6)
IRL[3:0] = HHLH
(H'D)
INTMSK2[18]
—
—
INTMSKCLR2[18]
IRL[7:4] = HHHL H'3C0 1
INTMSK2[1]
—
—
(H'E)
INTMSKCLR2[1]
IRL[3:0] = HHHL
(H'E)
INTMSK2[17]
—
—
INTMSKCLR2[17]
IRQ
IRQ[0]
H'240 INTPRI INTMSK0[31]
INTREQ —
[31:28] _{INTMSKCLR0[31]} [31]
IRQ[1]
H'280 INTPRI INTMSK0[30]
INTREQ —
[27:24] _{INTMSKCLR0[30]} [30]
IRQ[2]
H'2C0 INTPRI INTMSK0[29]
INTREQ —
[23:20] _{INTMSKCLR0[29]} [29]
IRQ[3]
H'300 INTPRI INTMSK0[28]
INTREQ —
[19:16] _{INTMSKCLR0[28]} [28]
IRQ[4]
H'340 INTPRI INTMSK0[27]
INTREQ —
[15:12] _{INTMSKCLR0[27]} [27]
IRQ[5]
H'380 INTPRI INTMSK0[26]
INTREQ —
[11:8] _{INTMSKCLR0[26]} [26]
IRQ[6]
H'3C0 INTPRI INTMSK0[25]
INTREQ —
[7:4]
INTMSKCLR0[25] ^[25]
IRQ[7]
H'200 INTPRI INTMSK0[24]
INTREQ —
[3:0]
INTMSKCLR0[24] ^[24]
Priority
in the
Source
High
Low
Default
Priority
High
Low
Rev. 1.00 Oct. 01, 2007 Page 299 of 1956
REJ09B0256-0100