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SH7763 Datasheet, PDF (1929/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Section 43 Electrical Characteristics
43.4.6 External CPU Interface Read/Write Access Timing
Table 43.14 External CPU Interface Access Timing
Conditions: VCCQ = VDD_RTC = AVCC = 3.0 to 3.6 V, VCCQ-DDR = 2.3 to 2.7 V, VDD = 1.15 to
1.35 V, Ta = −20 to 75°C
Item
Symbol
External CPU bus release request (BREQ) t
SEBRQ
setup time
External CPU bus release request (BREQ) tTMS
hold time
External CPU bus request acknowledge t
DEBAK
(BACK) delay time
Address/write data setup time
t
SEDA
Address/write data hold time
tHEDA
Read data delay time
t
DED
EX_CSn setup time
tSECS
EX_CSn hold time
tHECS
EX_BS setup time
tSEBS
EX_BS hold time
t
HEBS
EX_FRAME setup time
t
SEFR
EX_FRAME hold time
t
HEFR
EX_RDWR setup time
t
SERW
EX_RDWR hold time
tHERW
EX_RDY delay time
t
DERY
Min.
6
3
1
6
3
1
6
3
6
3
6
3
6
3
1
Typ.
—
Max.
—
Unit Figure
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Rev. 1.00 Oct. 01, 2007 Page 1863 of 1956
REJ09B0256-0100