SH7763 Datasheet, PDF (1316/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 30 SIM Card Module (SIM)
Initial
Bit Bit Name Value R/W Description
1, 0 CKE[1:0] 00
R/W Clock Enable
Select the clock source for the smart card interface, and
enable/disable clock output from the SIM_CLK pin.
00: Fix the output pin at low
01: Clock output as the output pin
10: Fix the output pin at high
11: Clock output as the output pin
30.3.4 Transmit Shift Register (SCTSR)
SCTSR is a shift register that transmits serial data.
The smart card interface transfers transmit data from the transmit data register (SCTDR) to
SCTSR, and then sends the data in order from the LSB or MSB to the SIM_TXD pin to perform
serial data transmission.
When data transmission of one byte is completed, transmit data is automatically transferred from
SCTDR to SCTSR, and transmission is initiated. When the TDRE flag in the serial status register
(SCSSR) is set to 1, no data is transferred from SCTDR to SCTSR.
Direct reading and writing of SCTSR from the CPU or DMAC is not possible.
Rev. 1.00 Oct. 01, 2007 Page 1250 of 1956
REJ09B0256-0100