SH7763 Datasheet, PDF (1443/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 32 PC Card Controller (PCC)
Bit
Bit Name Initial Value R/W Description
6, 5 IREQE[1:0] 00
R/W PCC0IREQ Request Enable
These bits enable or disable IREQ pin interrupt
requests and select the interrupt mode when the PC
card connected to area 6 is the I/O card interface type.
Note that bit 5 (P0IREQ) in the area 6 card status
change register (PCC0CSCR) is cleared if the values in
bits 6 and 5 in this register are changed. These bits
have no meaning on the IC memory card interface.
00: IREQ requests are not accepted for the PC card
connected to area 6. Bit 5 in the status change
register (PCC0CSCR) functions as a read-only bit
that indicates the inverse of the IREQ pin signal.
01: The level-mode IREQ interrupt request signal is
accepted for the PC card connected to area 6. In
level mode, an interrupt occurs when level 0 of the
signal input from the IREQ pin is detected.
10: The pulse-mode IREQ interrupt request signal is
accepted for the PC card connected to area 6. In
pulse mode, an interrupt occurs when a falling edge
from 1 to 0 of the signal input from the IREQ pin is
detected.
11: The pulse-mode IREQ interrupt request signal is
accepted for the PC card connected to area 6. In
pulse mode, an interrupt occurs when a rising edge
from 0 to 1 of the signal input from the IREQ pin is
detected.
Rev. 1.00 Oct. 01, 2007 Page 1377 of 1956
REJ09B0256-0100