SH7763 Datasheet, PDF (782/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 20 16-Bit Timer Pulse Unit (TPU)
Initial
Bit Bit Name Value R/W Description
4, 3 CKEG[1:0] 00
R/W Clock Edge
These bits select the input clock edge. When the input clock
is counted using both edges, the input clock period is halved
(e.g. φ/4 both edges = φ/2 rising edge). If phase counting
mode is used this setting is ignored.
00: Count at rising edge
01: Count at falling edge
1X: Count at both edges*
[Legend] X: Don’t care
Note: * If Pck0/1 is selected for the input clock, operation is
disabled.
2 to 0 TPSC[2:0] 000 R/W Time Prescaler
These bits select the TCNT counter clock. The clock source
can be selected independently for each channel. Table 20.5
shows the clock sources that can be set for each channel.
For more in formation on count clock selection, see table
20.6.
Table 20.5 TPU Clock Sources
Channel Pck0/1
0
1
2
3
[Legend]
: Setting
Blank : No setting
Internal Clock
Pck0/4
Pck0/16
Pck0/64
External Clock
TPU_TI2A TPU_TI3A
Rev. 1.00 Oct. 01, 2007 Page 716 of 1956
REJ09B0256-0100