SH7763 Datasheet, PDF (22/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

23.3.44 Added Qtag Value Set Register (Port 0 to 1) (TSU_ADQT0).............................. 867
23.3.45 Added Qtag Value Set Register (Port 1 to 0) (TSU_ADQT1).............................. 868
23.3.46 VLANtag Set Register (Port 0) (TSU_VTAG0)................................................... 869
23.3.47 VLANtag Set Register (Port 1) (TSU_VTAG1)................................................... 870
23.3.48 CAM Entry Table Busy Register (TSU_ADSBSY) ............................................. 871
23.3.49 CAM Entry Table Enable Register (TSU_TEN) .................................................. 872
23.3.50 CAM Entry Table POST1 Register (TSU_POST1).............................................. 877
23.3.51 CAM Entry Table POST2 Register (TSU_POST2).............................................. 880
23.3.52 CAM Entry Table POST3 Register (TSU_POST3).............................................. 883
23.3.53 CAM Entry Table POST4 Register (TSU_POST4).............................................. 886
23.3.54 CAM Entry Table 0H to 31H Registers (TSU_ADRH0 to TSU_ADRH31)........ 889
23.3.55 CAM Entry Table 0L to 31L Registers (TSU_ADRL0 to TSU_ADRL31) ......... 890
23.3.56 Transmit Frame Counter Register (Port 0) (Normal Transmission Only)
(TXNLCR0).......................................................................................................... 891
23.3.57 Transmit Frame Counter Register (Port 0)
(Normal and Erroneous Transmission) (TXALCR0) ........................................... 892
23.3.58 Receive Frame Counter Register (Port 0) (Normal Reception Only)
(RXNLCR0) ......................................................................................................... 893
23.3.59 Receive Frame Counter Register (Port 0) (Normal and Erroneous Reception)
(RXALCR0) ......................................................................................................... 894
23.3.60 Relay Frame Counter Register (Port 1 to 0) (Normal Relay Only)
(FWNLCR0) ......................................................................................................... 895
23.3.61 Relay Frame Counter Register (Port 1 to 0)
(Normal and Erroneous Transmission) (FWALCR0)........................................... 896
23.3.62 Transmit Frame Counter Register (Port 1)
(Normal Transmission Only) (TXNLCR1)........................................................... 897
23.3.63 Transmit Frame Counter Register (Port 1)
(Normal and Erroneous Transmission) (TXALCR1) ........................................... 898
23.3.64 Receive Frame Counter Register (Port 1) (Normal Reception Only)
(RXNLCR1) ......................................................................................................... 899
23.3.65 Receive Frame Counter Register (Port 1)
(Normal and Erroneous Reception) (RXALCR1)................................................. 900
23.3.66 Relay Frame Counter Register (Port 0 to 1) (Normal Relay Only)
(FWNLCR1) ......................................................................................................... 901
23.3.67 Relay Frame Counter Register (Port 0 to 1)
(Normal and Erroneous Transmission) (FWALCR1)........................................... 902
23.3.68 E-DMAC Start Register (EDSR) .......................................................................... 903
23.3.69 E-DMAC Mode Register (EDMR)....................................................................... 904
23.3.70 E-DMAC Transmit Request Register (EDTRR) .................................................. 906
23.3.71 E-DMAC Receive Request Register (EDRRR).................................................... 907
Rev. 1.00 Oct. 01, 2007 Page xxii of lxvi