SH7763 Datasheet, PDF (910/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
23.3.32 Relay FIFO Size Select Register (TSU_FCM)
TSU_FCM selects the size of the relay FIFO in the TSU, used for relay operations between the E-
MAC-0 and E-MAC-1.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
















Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0













FCM[2:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
31 to 3 
All 0 R
Reserved
These bits are always read as 0. The write value should
always be 0.
2 to 0 FCM[2:0] All 0 R/W Relay FIFO Size
H'0: Port 0 to 1: 3 Kbytes Port 1 to 0: 3 Kbytes
H'1: Port 0 to 1: 4 Kbytes Port 1 to 0: 2 Kbytes
H'2: Port 0 to 1: 5 Kbytes Port 1 to 0: 1 Kbyte
H'3: Port 0 to 1: 6 Kbytes Port 1 to 0: Not used
H'4: Port 0 to 1: Not used Port 1 to 0: 6 Kbytes
H'5: Port 0 to 1: 1 Kbyte Port 1 to 0: 5 Kbytes
H'6: Port 0 to 1: 2 Kbytes Port 1 to 0: 4 Kbytes
H'7: Setting prohibited
This register must not be written to once after relay
operations have been enabled (after the FWEN0 bit in
TSU_FWEN0 or the FWEN1 bit in TSU_FWEN1 is set
to 1).
When data equal to or greater than the specified size of
64 bytes is stored in the relay FIFO, an overflow is
detected and the frame being transferred is discarded.
Rev. 1.00 Oct. 01, 2007 Page 844 of 1956
REJ09B0256-0100