SH7763 Datasheet, PDF (334/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 9 Interrupt Controller (INTC)
9.3.14 Interrupt Source Register 0 (Mask State is not affected) (INT2A0)
INT2A0 (mask state is not affected) is a 32-bit read-only register that indicates interrupt source
modules. Even if interrupt masking is set in the interrupt mask register, INT2A0 indicates a source
module in a corresponding bit (the corresponding interrupt is not generated). If source indication is
not necessary depending on the state of the interrupt mask register, use INT2A1.
Bit:
Initial value:
R/W:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
− − − − − − − − ^GPIO
SSIO MMCIF
SIOF0 PCIC5 PCIC4 PCIC3 PCIC2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RRRRRRRRRRRRRRRR
Bit:
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
− − − − ^{PCIC1 PCIC0 HAC CMT}
DMAC H-UDI
WDT SCIF1 SCIF0 RTC TMU1 TMU0
Initial value:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
RRR
R
R
R
RRR
R
R
RRR
R
R
Bit
Bit Name
31 to 26 —
Initial
Value
All 0
25
GPIO
0
24
—
0
23
SSI0
0
22
MMCIF 0
21
—
0
20
SIOF0
0
19
PCIC5
0
18
PCIC4
0
17
PCIC3
0
16
PCIC2
0
15
PCIC1
0
14
PCIC0
0
13
HAC
0
R/W Function
Description
R
These bits are always read as 0. Indicates interrupt
The write value should always be sources for each
0.
peripheral module
R
Indicates GPIO interrupt source ^{(INT2A0 is not}
affected by the state
R
This bit is always read as 0. The _{of the interrupt mask}
write value should always be 0. _register).
R
Indicates SSI0 interrupt source _{0: No interrupts}
R
Indicates MMCIF interrupt source _{1: Interrupts are}
R
This bit is always read as 0. The
generated
write value should always be 0. Note: Reading the
R
Indicates SIOF0 interrupt source
R
Indicates PCIC5 interrupt source
INTEVT code
notified to the
CPU directly
R
Indicates PCIC4 interrupt source
R
Indicates PCIC3 interrupt source
can identify
interrupt
sources. In this
R
Indicates PCIC2 interrupt source
case, reading
R
Indicates PCIC1 interrupt source
R
Indicates PCIC0 interrupt source
INT2A0 is not
necessary.
R
Indicates HAC interrupt source
Rev. 1.00 Oct. 01, 2007 Page 268 of 1956
REJ09B0256-0100