SH7763 Datasheet, PDF (1189/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 28 Serial Communication Interface with FIFO/IrDA Interface (SCIF/IrDA)
SCIF2_RXD
Serial receive data
SPTRR
SPTRR: Read from SCSPTR
Peripheral bus
Figure 28.4 SCIF2_RXD Pin
28.2 Input/Output Pins
Table 28.1 shows the SCIF/IrDA pin configuration. The channel number is omitted in the
description below.
Table 28.1 Pin Configuration
Pin Name
Function
I/O
Description
SCIF2_SCK
Serial clock pin
I/O*
Clock input/output
SCIF2_RXD
Receive data pin
Input
Receive data input
SCIF2_TXD
Transmit data pin
Output Transmit data output
Notes: These pins are made to function as serial pins by performing SCIF operation settings with
the C/A bit in SCSMR, and the TE, RE, CKE1, and CKE0 bits in SCSCR. Break state
transmission and detection can be set in SCSPTR of the SCIF.
* When the infrared data communication function is selected, a serial clock should be
input at the SCIF2_SCK pin
Rev. 1.00 Oct. 01, 2007 Page 1123 of 1956
REJ09B0256-0100