SH7763 Datasheet, PDF (796/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 20 16-Bit Timer Pulse Unit (TPU)
20.4.2 Basic Functions
(1) Counter Operation
When one of bits CST[0:3] is set to 1 in TSTR, the TCNT counter for the corresponding channel
starts counting. TCNT can operate as a free-running counter, periodic counter, and so on.
(a) Example of count operation setting procedure
Figure 20.2 shows an example of the count operation setting procedure.
Operation selection
Select counter clock
[1]
Periodic counter
Free-running counter
Select counter clearing source [2]
Select output compare register [3]
[1] Select the counter clock
with bits TPSC2 to TPSC0
in TCR. At the same time
select the input clock edge
with bits CKEG1 and
CKEG0 in TCR.
[2] For periodic counter
operation, select the TGRA
to be used as the TCNT
clearing source with bits
CCLR2 to CCLR0 in TCR.
[3] ^{Designate the output compare}
register by means of TIOR.
Set period
[4]
Set external pin function
[5]
Start count
[6]
<Periodic counter>
Set external pin function
Start count
<Free-running counter>
[4] ^{Set the periodic counter cycle}
in the TGRA.
[5]
[5] ^{Set the external pin function}
in pin function controller (PFC).
[6]
[6] ^{Set the CST bit in TSTR to 1}
to start the counter operation.
Figure 20.2 Example of Counter Operation Setting Procedure
Rev. 1.00 Oct. 01, 2007 Page 730 of 1956
REJ09B0256-0100