SH7763 Datasheet, PDF (1420/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 31 Multimedia Card Interface (MMCIF)
31.5.2 Operation in Write Sequence
To transfer data using the DMAC, set MMCIF (DMACR) after setting the DMAC.
When using DMA, it is possible to process the inter-block interrupt by hardware in pre-defined
multiblock transfer by setting the AUTO bit in DMACR to 1. Figure 31.20 shows an example of
the operational flow for a pre-defined multiblock write sequence in MMC mode using auto-mode.
• Clear FIFO.
• Set the block number to TBNCR.
• Set the START bit in CMDSTRT to 1 and command transmission will begin.
• Command response is received from the card.
• If the card does not return the command response, the command response is detected through
the command timeout error (CTERI).
• Set the DMACR and write data in FIFO.
• Confirm the DMAC transfer completion and clear the DMAEN bit in DMACR to 0.
• The end of the command sequence is detected by poling the BUSY flag in CSTR or through
the pre-defined multiblock transfer end flag (BTI).
• An error in a command sequence (during data transmission) is detected through the CRC error
flag (CRCERI) or data timeout error flag. When these flags are detected, set the CMDOFF bit
in OPCR to 1, issue CMD12, and suspend the command sequence.
• Confirm there is no data busy condition. Detect the data busy state through the data busy end
flag (DBSYI).
• Detect whether the current state is the data busy state through the DTBUSY bit in CSTR after
the data transfer end (after DRPI detection). If it is still the data busy state, use the DBSYI flag
to confirm the end of the data busy condition.
• Set the CMDOFF bit to 1 and end the command sequence.
• Set the CMDOFF bit to 1 when a CRC error (CRCERI) or command timeout error (CTERI)
occurs in the command response reception.
• Set the CMDOFF bit to 1, clear the DMACR to H'00, and clear FIFO when a CRC error
(CRCERI) or data timeout error (DTERI) occurs in the write data transmission.
Note: Access from the DMAC to FIFO must be done in bytes or words.
Rev. 1.00 Oct. 01, 2007 Page 1354 of 1956
REJ09B0256-0100