SH7763 Datasheet, PDF (1513/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

7. Parallel Right Aligned with Delay
As basic sample format configuration except PDTA = 1
SSI_SCK
Section 34 Serial Sound Interface (SSI)
SSI_WS
1st Channel
2nd Channel
SSI_SDATA TD0 0 0 TD3 TD2 TD1 TD0 0 0 TD3 TD2 TD1 TD0 0 0 TD3
Figure 34.16 Parallel Right Aligned with Delay
8. Mute Enabled
As basic sample format configuration except MUEN = 1 (TD data ignored)
SSI_SCK
SSI_WS
1st Channel
2nd Channel
SSI_SDATA
0000
00
00 0 00 00 0 0 0
Figure 34.17 Mute Enabled
Rev. 1.00 Oct. 01, 2007 Page 1447 of 1956
REJ09B0256-0100