SH7763 Datasheet, PDF (714/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 17 Watchdog Timer and Reset (WDT)
17.3 Register Descriptions
Table 17.2 shows the registers of the reset and watchdog timer. Table 17.3 shows the register state
in each operating mode.
Table 17.2 Register Configuration
Register Name
Abbreviation R/W
Watchdog timer stop time register WDTST
R/W
Watchdog timer control/status
WDTCSR
R/W
register
Watchdog timer base stop time WDTBST
R/W
register
Watchdog timer counter
WDTCNT
R
Watchdog timer base counter
WDTBCNT R
P4 Address
H'FFCC 0000
H'FFCC 0004
H'FFCC 0008
H'FFCC 0010
H'FFCC 0018
Area 7 Address
H'1FCC 0000
H'1FCC 0004
Access
Size
32
32
H'1FCC 0008
32
H'1FCC 0010
32
H'1FCC 0018
32
Table 17.3 Register State in Each Operating Mode
Register Name
Power-on Power-on
Reset by Reset by Manual
Abbreviation PRESET Pin WDT/H-UDI Reset
Sleep
Standby
Watchdog timer stop time
register
WDTST
H'0000 0000 Retained Retained Retained Retained
Watchdog timer control/status WDTCSR
register
H'0000 0000 Retained Retained Retained Retained
Watchdog timer base stop time WDTBST
register
H'0000 0000 Retained Retained Retained Retained
Watchdog timer counter
WDTCNT H'0000 0000 Retained Retained Retained Retained
Watchdog timer base counter WDTBCNT H'0000 0000 Retained Retained Retained Retained
Rev. 1.00 Oct. 01, 2007 Page 648 of 1956
REJ09B0256-0100