SH7763 Datasheet, PDF (1566/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 36 USB Function Controller (USBF)
Table 36.2 (2) Register Configuration (Access Size = 32 bits)
Register Name
Abbreviation
Interrupt flag register 0
IFR0
Interrupt flag register 1
IFR1
Interrupt flag register 2
IFR2
Interrupt flag register 3
IFR3
Interrupt enable register 0 IER0
Interrupt enable register 1 IER1
Interrupt enable register 2 IER2
Interrupt enable register 3 IER3
Interrupt select register 0
ISR0
Interrupt select register 1
ISR1
Interrupt select register 2
ISR2
Interrupt select register 3
ISR3
EP0i data register
EPDR0i
EP0o data register
EPDR0o
EP0s data register
EPDR0s
EP1 data register
EPDR1
EP2 data register
EPDR2
EP3 data register
EPDR3
EP4 data register
EPDR4
EP5 data register
EPDR5
EP0o receive data size
register
EPSZ0o
EP1 receive data size register EPSZ1
EP4 receive data size register EPSZ4
Data status register
DASTS
FIFO clear register 0
FCLR0
FIFO clear register 1
FCLR1
Endpoint stall register 0
EPSTL0
Endpoint stall register 1
EPSTL1
Trigger register
TRG
Area P4
Address*
H'FFEC 0000
H'FFEC 0004
H'FFEC 0008
H'FFEC 000C
H'FFEC 0010
H'FFEC 0014
H'FFEC 0018
H'FFEC 001C
H'FFEC 0020
H'FFEC 0024
H'FFEC 0028
H'FFEC 002C
H'FFEC 0030
H'FFEC 0034
H'FFEC 0038
H'FFEC 0040
H'FFEC 0050
H'FFEC 0060
H'FFEC 0070
H'FFEC 0080
H'FFEC 0090
Area 7
Address*
H'1FEC 0000
H'1FEC 0004
H'1FEC 0008
H'1FEC 000C
H'1FEC 0010
H'1FEC 0014
H'1FEC 0018
H'1FEC 001C
H'1FEC 0020
H'1FEC 0024
H'1FEC 0028
H'1FEC 002C
H'1FEC 0030
H'1FEC 0034
H'1FEC 0038
H'1FEC 0040
H'1FEC 0050
H'1FEC 0060
H'1FEC 0070
H'1FEC 0080
H'1FEC 0090
Access size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
H'FFEC 0094 H'1FEC 0094 32
H'FFEC 0098 H'1FEC 0098 32
H'FFEC 009C H'1FEC 009C 32
H'FFEC 00A0 H'1FEC 00A0 32
H'FFEC 00A4 H'1FEC 00A4 32
H'FFEC 00A8 H'1FEC 00A8 32
H'FFEC 00AC H'1FEC 00AC 32
H'FFEC 00B0 H'1FEC 00B0 32
Rev. 1.00 Oct. 01, 2007 Page 1500 of 1956
REJ09B0256-0100