SH7763 Datasheet, PDF (207/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 6 Memory Management Unit (MMU)
256
H'0000 0000
P0 area
Cacheable
Address translation possible
Physical ₂₅₆
address space
Area 0
Area 1
Area 2
Area 3
Area 4
Area 5
Area 6
Area 7
U0 area
Cacheable
Address translation possible
H'8000 0000
P1 area
Cacheable
H'A000 0000 ^{Address translation not possible}
P2 area
Non-cacheable
Address translation not possible
H'C000 0000
P3 area
Cacheable
H'E000 0000 ^{Address translation possible}
P4 area
Non-cacheable
H'FFFF FFFF ^{Address translation not possible}
Privileged mode
Address error
Store queue area
Address error
On-chip memory area
Address error
User mode
Figure 6.3 Virtual Address Space (AT in MMUCR = 1)
H'0000 0000
H'8000 0000
H'E000 0000
H'E400 0000
H'E500 0000
H'E600 0000
H'FFFF FFFF
Rev. 1.00 Oct. 01, 2007 Page 141 of 1956
REJ09B0256-0100