SH7763 Datasheet, PDF (1942/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 43 Electrical Characteristics
REF50CK
RMIIn_CRS_DV,
RMII1M_CRS_DV
RMIIn_RXD1, RMIIn_RXD0
RMII1M_RXD1, RMII1M_RXD0
RMIIn_RX_ER,
RMII1M_RX_ER
Preamble
SFD DATA
tRRERS
tRRERH
XXXX
Figure 43.51 RMII Receive Timing (When an Error is Detected)
43.4.12 Stream Interface Module Timing
(1) Clock Valid Reception
Table 43.22 STIF Clock Valid Reception Signal Timing
Conditions: V_CCQ = VDD_RTC = AV_CC = 3.0 to 3.6 V, V_CCQ-DDR = 2.3 to 2.7 V, VDD = 1.15 to
1.35 V, Ta = −20 to 75°C
Item
ST_CLK cycle time
ST_REQ delay time
ST_START setup time
ST_START hold time
ST_VALID setup time
ST_VALID hold time
ST_DATA setup time
ST_DATA hold time
Symbol
t_STCYC
t_STRQD
t
STSTS
t
STSTH
t
STVLS
t
STVLH
t
STDS
t_STDH
Min.
30
4
7
4
7
4
7
4
Max.
—
21
—
—
—
—
—
—
Unit Figure
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Rev. 1.00 Oct. 01, 2007 Page 1876 of 1956
REJ09B0256-0100