SH7763 Datasheet, PDF (1325/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 30 SIM Card Module (SIM)
30.3.9 Smart Card Mode Register (SCSCMR)
SCSCMR is an 8-bit readable/writable register that selects functions of the smart card interface.
Bit:
Initial value:
R/W:
7
−
0
R/W
6
LCB
0
R/W
5
PB
0
R/W
4
−
0
R/W
3
SDIR
0
R/W
2
SINV
0
R/W
1
RST
0
R/W
0
SMIF
1
R/W
Initial
Bit Bit Name Value
7

0
6
LCB
0
5
PB
0
4

0
3
SDIR
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
This bit is always read as 0. The write value should always
be 0.
Last Character
When this bit is set to 1, the character protection time is 2
etus, and the setting of the guard extension register is
invalid.
0: The character protection time is determined by the value
of the guard extension register.
1: The character protection time is 2 etus.
Protocol
Selects the T = 0 or T = 1 protocol.
0: The smart card interface operates according to the T = 0
protocol.
1: The smart card interface operates according to the T = 1
protocol.
Reserved
This bit is always read as 0. The write value should always
be 0.
Smart Card Data Transfer Direction
Selects the format for serial/parallel conversion.
0: Transmits the SCTDR contents in LSB-first.
Received data is stored in SCRDR as LSB-first.
1: Transmits the SCTDR contents in MSB-first.
Received data is stored in SCRDR as MSB-first.
Rev. 1.00 Oct. 01, 2007 Page 1259 of 1956
REJ09B0256-0100