SH7763 Datasheet, PDF (627/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
PCICLK
AD[31:0]
PAR
CBE[3:0]
(C/BE[3:0])
PCIFRAME
IRDY
DEVSEL
TRDY
Addr
AP
Com
D0
D1
Dn
DP0
DPn-1
DPn
BE0
BE1
BEn
[Legend]
Addr: PCI space address
AP: Address parity
Com: Command
Dn: nth data
DPn: nth data parity
BEn: nth data byte enable
Figure 13.26 Target Memory Read Cycle in Host Bus Bridge Mode (Burst, with stepping)
Rev. 1.00 Oct. 01, 2007 Page 561 of 1956
REJ09B0256-0100