SH7763 Datasheet, PDF (462/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Local Bus State Controller (LBSC)
Figure 11.31 MPX Interface Timing 10 (Burst Read Cycle, IW = 0,
External Wait Control, 32-Bit Bus Width, 32-Byte Data Transfer)
Rev. 1.00 Oct. 01, 2007 Page 396 of 1956
REJ09B0256-0100