SH7763 Datasheet, PDF (95/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 1 Overview
Pin No. Pin Name
U25 A12
V1
VDD
V2
VDD
V3
VDD
V4
VDD
V5
VDD
V21
VSS
V22
A21
V23
A20
V24
A15
V25
A14
W1
PTG1/GNT2/ET1_ETXD0
I/O
O






O
O
O
O
IO/O/O
W2
PTG2/REQ1/ET1_ETXD1
IO/I/O
W3
PTG3/REQ3/ET1_ETXD2
IO/I/O
W4
W5
W21
W22
W23
W24
W25
Y1
PTF0/GNT0/GNTIN/SIM_D/
ET1_ETXD3/DREQ3
VDD
VDD
A25/EX_SIZE2
A24/EX_SIZE1
A23/EX_SIZE0
A22
PTE1/PCICLK/GET1_ETXD4/
DACK2
IO/IO/I/IO/O/I


O/I
O/I
O/I
O
IO/I/O/O
Y2
PTD6/REQ2/PCC_BVD1/
IO/I/I/O/IO/O
GET1_ETXD5/SSI1_SCK/
LCDM_VCPWC
Function
Power
Supply
Address bus
VCCQ
Internal VDD

Internal VDD

Internal VDD

Internal VDD

Internal VDD

Internal GND

Address bus
VCCQ
Address bus
VCCQ
Address bus
VCCQ
Address bus
VCCQ
Port/PCI bus grant/ETHER transmit VCCQ
data
Port/PCI bus request/ETHER
transmit data
VCCQ
Port/PCI bus request/ETHER
transmit data
VCCQ
Port/PCI bus grant/SIM data/ETHER VCCQ
transmit data/DMA transfer request
Internal VDD

Internal VDD

Address bus/access size
VCCQ
Address bus/access size
VCCQ
Address bus/access size
VCCQ
Address bus
VCCQ
Port/PCI input clock/GMII transmit
data/DMA transfer request
acknowledge
VCCQ
Port/PCI bus mastership request
(host)/PCMCIA BVD1/GMII transmit
data/SSI serial bit clock/LCD power
supply control (mirror pin)
VCCQ
Rev. 1.00 Oct. 01, 2007 Page 29 of 1956
REJ09B0256-0100