SH7763 Datasheet, PDF (262/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 7 Caches
Bit
8
7
6
5 to 0
Bit Name
RP
Initial
Value
0
IC2W
0
OC2W
0

All 0
R/W Description
R/W On-Chip Memory Protection Enable Bit
For details, see section 8.4, L Memory Protective
Functions.
R/W IC Two-Way Mode bit
0: IC is a four-way operation
1: IC is a two-way operation
For details, see section 7.4.3, IC Two-Way Mode.
R/W OC Two-Way Mode bit
0: OC is a four-way operation
1: OC is a two-way operation
For details, see section 7.3.6, OC Two-Way Mode.
R
Reserved
For details on reading from or writing to these bits, see
description in General Precautions on Handling of
Product.
Rev. 1.00 Oct. 01, 2007 Page 196 of 1956
REJ09B0256-0100