SH7763 Datasheet, PDF (487/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 12 DDR-SDRAM Interface (DDRIF)
12.4.2 DDR-SDRAM Control Register (SCR)
Bit:
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 47
Initial value:
R/W:
Bit:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RRRRRRRRRRRRRRRR
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Initial value:
R/W:
Bit:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RRRRRRRRRRRRRRRR
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value:
R/W:
Bit:
Initial value:
R/W:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RRRRRRRRRRRRRRRR
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
SMS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R R R R R R R R R R R R R R/W R/W R/W
Rev. 1.00 Oct. 01, 2007 Page 421 of 1956
REJ09B0256-0100