SH7763 Datasheet, PDF (417/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Local Bus State Controller (LBSC)
11.4.5 CSn PCMCIA Control Register (CSnPCR)
CSnPCR is a 32-bit readable/writable register that specifies the timing for the PCMCIA interface
connected to area n (n = 5 and 6), the space property, and the assert/negate timing for the OE and
WE signals. The pulse widths of OE and WE are set using the wait control bits in CSnWCR.
CSnPCR is initialized to H'7700 0000 by a power-on reset or a manual reset.
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
−
SAA
−
SAB
PCWA
PCWB
PCIW
0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
R R/W R/W R/W R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
−
TEDA
−
TEDB
−
TEHA
−
TEHB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
31

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
30 to 28 SAA
111
R/W Space Property A
Specify the space property of PCMCIA connected to
first half of area 5 or 6.
000: ATA complement mode
001: Dynamic I/O bus sizing
010: 8-bit I/O space
011: 16-bit I/O space
100: 8-bit common memory
101: 16-bit common memory
110: 8-bit attribute memory
111: 16-bit attribute memory
27

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 1.00 Oct. 01, 2007 Page 351 of 1956
REJ09B0256-0100