SH7763 Datasheet, PDF (1065/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 25 Stream Interface (STIF)
25.2 Input/Output Pins
Table 25.1 shows the pin configuration of this module. Channel 0 has two pin groups: normal I/O
pins and mirror input pins. Note that the mirror input pin group can only be used for input. The pin
select register of the PFC is used to select normal I/O pins or mirror input pins. The normal I/O
pins and mirror input pins cannot be used simultaneously or mixed together.
Table 25.1 Pin Configuration
Channel
Pin Name
I/O
Function
Description
0 Normal I/O ST0_CLK/ST0_STRB I/O
pins
ST0_REQ
I/O
Stream data clock/strobe
Stream data receive ready
request
ST0_START
I/O
Stream data synchronization
ST0_VALID
I/O
Stream data valid
ST0_D7 to ST0_D0
I/O
Stream data input/output
Mirror input ST0M_CLKIO/
pins*
ST0M_STRBI
I/O
Stream data clock/strobe
ST0M_REQO
Output Stream data receive ready
request
ST0M_STARTI
Input Stream data synchronization
input
ST0M_VALIDI
Input Stream data valid input
ST0M_D7I to ST0M_D0I Input Stream data input
1
ST1_CLK/ST1_STRB I/O
Stream data clock/strobe
ST1_REQ
I/O
Stream data receive ready
request
ST1_START
I/O
Stream data synchronization
ST1_VALID
I/O
Stream data valid
ST1_D7 to ST1_D0
I/O
Stream data input
Note: * Mirror pins are only for input.
Rev. 1.00 Oct. 01, 2007 Page 999 of 1956
REJ09B0256-0100