SH7763 Datasheet, PDF (753/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 19 Timer Unit (TMU)
Section 19 Timer Unit (TMU)
This LSI includes an on-chip 32-bit timer unit (TMU), which has six channels (channels 0 to 5).
19.1 Features
The TMU has the following features.
• Auto-reload type 32-bit down-counter provided for each channel
• Input capture function provided in channel 2
• Selection of rising edge or falling edge as external clock input edge when external clock is
selected or input capture function is used for each channel
• 32-bit timer constant register for auto-reload use, readable/writable at any time, and 32-bit
down-counter provided for each channel
• Selection of seven counter input clocks:
External clock (TMU_TCLK) for channel 0 to 2 only, RTC clock (RTCCLK) and five
peripheral clocks (Pck0/4, Pck0/16, Pck0/64, Pck0/256, and Pck0/1024) (Pck0 is the peripheral
clock0) for each channel.
• Two interrupt sources
One underflow source (each channel) and one input capture source (channel 2)
Rev. 1.00 Oct. 01, 2007 Page 687 of 1956
REJ09B0256-0100