SH7763 Datasheet, PDF (1944/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 43 Electrical Characteristics
STn_CLK
STn_REQ
STn_START
STn_VALID
STn_DC[7:0]
t_STCYC
t_STSTD
t_STVLD
t_STDD
t_STRQS
t_STRQH
Figure 43.53 STIF Clock Valid Transmit Timing
(3) Strobe Reception
Table 43.24 STIF Strobe Reception Signal Timing
Conditions:
V_CCQ = VDD_RTC = AV_CC = 3.0 to 3.6 V, V_CCQ-DDR = 2.3 to 2.7 V, VDD = 1.15 to
1.35 V, Ta = −20 to 75°C
Item
ST_STRB low level width
ST_STRB high level width
ST_REQ output delay time
ST_DATA setup time
ST_DATA hold time
Symbol
t_STSLW
t_STSHW
t_STRQD
t
STDS
t
STDH
Min.
30
30
0
7
4
Max.
—
—
—
—
—
Unit Figure
ns 43.54
ns 43.54
ns 43.54
ns 43.54
ns 43.54
STn_STRB
ST0M_STRBI
STn_REQ
ST0M_REQO
STn_D7_STn_D0
ST0M_D7I_ST0M_D0I
t_STSHW
t_STSLW
t_STDS
t_STDH
t_STRQD
Figure 43.54 STIF Strobe Receive Timing
Rev. 1.00 Oct. 01, 2007 Page 1878 of 1956
REJ09B0256-0100