SH7763 Datasheet, PDF (52/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Figure 34.10 Inverted Clock ..................................................................................................... 1445
Figure 34.11 Inverted Word Select........................................................................................... 1445
Figure 34.12 Inverted Padding Polarity.................................................................................... 1445
Figure 34.13 Padding Bits First, Followed by Serial Data, with Delay.................................... 1446
Figure 34.14 Padding Bits First, Followed by Serial Data, without Delay............................... 1446
Figure 34.15 Serial Data First, Followed by Padding Bits, without Delay............................... 1446
Figure 34.16 Parallel Right Aligned with Delay ...................................................................... 1447
Figure 34.17 Mute Enabled ...................................................................................................... 1447
Figure 34.18 Transition Diagram between Operation Modes................................................... 1448
Figure 34.19 Transmission Using DMA Controller ................................................................. 1450
Figure 34.20 Transmission using Interrupt Data Flow Control ................................................ 1451
Figure 34.21 Reception using DMA Controller ....................................................................... 1453
Figure 34.22 Reception using Interrupt Data Flow Control ..................................................... 1454
Section 35 USB Host Controller (USBH)
Figure 35.1 Block Diagram of USBH ...................................................................................... 1458
Figure 35.2 Connection Example of External Circuit .............................................................. 1493
Section 36 USB Function Controller (USBF)
Figure 36.1 Block Diagram of USBF ....................................................................................... 1496
Figure 36.2 Example of Endpoint Configuration ..................................................................... 1554
Figure 36.3 Cable Connection Operation ................................................................................. 1559
Figure 36.4 Cable Disconnection Operation............................................................................. 1560
Figure 36.5 Setup Stage Operation ........................................................................................... 1561
Figure 36.6 Data Stage (Control-In) Operation ........................................................................ 1562
Figure 36.7 Data Stage (Control-Out) Operation ..................................................................... 1563
Figure 36.8 Status Stage (Control-In) Operation...................................................................... 1564
Figure 36.9 Status Stage (Control-Out) Operation ................................................................... 1565
Figure 36.10 EP1 Bulk-Out Transfer Operation....................................................................... 1566
Figure 36.11 EP2 Bulk-In Transfer Operation ......................................................................... 1567
Figure 36.12 EP3 Interrupt-In Transfer Operation ................................................................... 1569
Figure 36.13 EP4 Isochronous-Out Transfer Operation (SOF is Normal) ............................... 1570
Figure 36.14 EP4 Isochronous-Out Transfer Operation (SOF is Broken)................................ 1571
Figure 36.15 EP5 Isochronous-In Transfer Operation (SOF is Normal) .................................. 1573
Figure 36.16 EP5 Isochronous-In Transfer Operation (SOF in Broken) .................................. 1574
Figure 36.17 Forcible Stall by Application .............................................................................. 1578
Figure 36.18 Automatic Stall by USB Function Controller...................................................... 1580
Figure 36.19 Example of Transceiver Connection for USB function Controller ..................... 1581
Figure 36.20 Set Timing of TR Interrupt Flag.......................................................................... 1584
Rev. 1.00 Oct. 01, 2007 Page lii of lxvi