SH7763 Datasheet, PDF (1373/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 31 Multimedia Card Interface (MMCIF)
31.3.10 Data Timeout Register (DTOUTR)
DTOUTR specifies the period for generating a data timeout. The 16-bit counter (DTOUTC) and a
prescaler count peripheral clock 1 to monitor the data timeout. The prescaler always counts
peripheral clock 1, and outputs a count pulse at every 10,000 peripheral clock 1 cycles. The initial
value of DTOUTC is 0, and DTOUTC starts counting the prescaler output at the start of the
command sequence. DTOUTC is cleared when the command sequence has ended, or when the
command sequence has been aborted by setting the CMDOFF bit to 1, after which the DTOUTC
stops counting the prescaler output.
When the command sequence does not end, DTOUTC continues counting the prescaler output,
and enters the data timeout error states when the number of prescaler outputs reaches the number
specified in DTOUTR. When the DTERIE bit in INTCR1 is set to 1, the DTERI flag in INTSTR1
is set. To perform data timeout error handling, abort the command sequence by setting the
CMDOFF bit to 1, and then clear the DTERI flag.
For a command with data busy status, data timeout cannot be monitored since the command
sequence is terminated before entering the data busy state. Timeout in the data busy state should
be monitored by firmware. Setting DTOUTR to 0 will cause a timeout immediately after the start
of the command sequence.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
DTOUTR
Initial value: 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W
15 to 0 DTOUTR All 1 R/W
Description
Data Timeout Time/10,000
Data timeout time: Peripheral clock 1 cycle × DTOUTR
setting value × 10,000.
Rev. 1.00 Oct. 01, 2007 Page 1307 of 1956
REJ09B0256-0100