SH7763 Datasheet, PDF (578/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
(16) PCI Memory Bank Register 0 (PCIMBR0)
This register specifies the upper 14-bit address of the PCI memory space 0 (address bits 31 to 18).
Refer to Section 13.4.3 (2), Accessing PCI Memory Space.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
PMSBA0
——
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R
PCI R/W: — — — — — — — — — — — — — — — —
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R R R R R R R R R R R R R R R R
PCI R/W: — — — — — — — — — — — — — — — —
Bit
Bit Name
31 to 18 PMSBA0
Initial
Value R/W
H'0000 SH: R/W
PCI: 
17 to 0 
All 0 SH: R
PCI: 
Description
PCI Memory Space 0 Bank Address
Specify the bank address in PCI memory space 0 for
a master access.
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Oct. 01, 2007 Page 512 of 1956
REJ09B0256-0100