SH7763 Datasheet, PDF (633/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 14 Direct Memory Access Controller (DMAC)
14.2 Input/Output Pins
The external pins for the DMAC are described below. Table 14.1 lists the configuration of the pins
that are connected to external device. The DMAC has pins for four channels (channel 0 to 3) for
external bus use.
The input/output pins of channel 1 are divided in two groups: normal I/O group and mirror I/O
group. The input/output operations of pins in two groups are always the same. The pin select
register of the GPIO is used to select the Channel 1 pins.
Table 14.1 Pin Configuration
Channel Pin Name Function
0
DREQ0*¹ DMA transfer request
DACK0*² DMA transfer request
acknowledge
TEND0*²
1 Normal DREQ1*¹
I/O
Pins _DACK1*2
DMA transfer end
notification
DMA transfer request
DMA transfer request
acknowledge
Miller
I/O
Pins
TEND1*² DMA transfer end
notification
DREQ1M*¹ DMA transfer request
DACK1M*² DMA transfer request
acknowledge
TEND1M*² DMA transfer end
notification
I/O
Description
Input DMA transfer request input from
external device to channel 0
Output Strobe output from channel 0 to
external device which has output,
regarding DMA transfer request
Output DMA transfer end output from channel
0 to external device
Input DMA transfer request input from
external device to channel 1
Output Strobe output from channel 1 to
external device which has output,
regarding DMA transfer request
Output DMA transfer end output from channel
1 to external device
Input DMA transfer request input from
external device to channel 1
Output Strobe output from channel 1 to
external device which has output,
regarding DMA transfer request
Output DMA transfer end output from channel
1 to external device
Rev. 1.00 Oct. 01, 2007 Page 567 of 1956
REJ09B0256-0100