SH7763 Datasheet, PDF (1330/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 30 SIM Card Module (SIM)
30.3.13 Sampling Register (SCSMPL)
SCSMPL is a 16-bit readable/writable register that sets the number of serial clock cycles per etu.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
−−− − −
SCSMPL[10:0]
Initial value: 0
0
0
0
0
0
0
1
0
1
1
1
0
0
1
1
R/W: R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 11 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
10 to 0 SCSMPL H'173
[10:0]
R/W Setting for Number of Serial Clock Cycles per Etu
The number of serial clock cycles per etu is (SCSMPL
value + 1). The value written to SCSMPL should always
be H'0007 or greater.
Rev. 1.00 Oct. 01, 2007 Page 1264 of 1956
REJ09B0256-0100