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SH7763 Datasheet, PDF (1936/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Section 43 Electrical Characteristics
43.4.11 GETHER Module Signal Timing
(1) Ethernet Controller Signal Timing (MII)
Table 43.19 Ethernet Controller Signal Timing (MII)
Conditions:
VCCQ = VDD_RTC = AVCC = 3.0 to 3.6 V, VCCQ-DDR = 2.3 to 2.7 V, VDD = 1.15 to
1.35 V, Ta = −20 to 75°C
Item
ETn_TX-CLK cycle time
ETn_TX-EN output delay time
ETn_ETXD[3:0] output delay time
ETn_RX-CLK cycle time
ETn_RX-DV setup time
ETn_RX-DV hold time
ETn_ERXD[3:0] setup time
ETn_ERXD[3:0] hold time
ETn_RX-ER setup time
ETn_RX-ER hold time
ETn_WOL output delay time
Symbol
t
Tcyc
t
TEND
tTEDD
tRcyc
tRDVS
t
RDVH
t
ERDS
t
ERDH
t
ERRS
tERRH
t
WOLD
Min.
40
3
3
40
10
3
10
3
10
3
1
Typ.
—
—
—
—
—
—
—
—
—
—
—
Max.
—
20
20
—
—
—
—
—
—
—
18
Unit Figure
ns 43.41
ns 43.41
ns 43.41
ns 43.42
ns 43.42
ns 43.42
ns 43.42
ns 43.42
ns 43.43
ns 43.43
ns 43.44
Rev. 1.00 Oct. 01, 2007 Page 1870 of 1956
REJ09B0256-0100