SH7763 Datasheet, PDF (1546/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 35 USB Host Controller (USBH)
35.3.19 HcRhDescriptorA Register (USBHRDA) (Only one port is supported by this LSI.)
This register is only reset by a power-on reset. It is written during system initialization to
configure the Root Hub. These bits should not be written during normal operation.
Bit : 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
POTPGT[7:0]
————————
Initial value : 0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W R R R R R R R R
Bit : 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — NOCP OCPM DT NPS PSM
NDP[7:0]
Initial value : 0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
R/W : R R R R/W R/W R R/W R/W R R R R R R R R
Bit
31 to 24
23 to 13
12
Bit Name
POTPGT

NOCP
Initial Value R/W
H'02
R/W
All 0
R
1
R/W
Description
PowerOnToPowerGoodTime
USB Host Controller power switching is effective
within 2 ms. The bit value is represented as the
number of 2 ms intervals.
Only bits 25 and 24 can be written to. The
remaining bits are read only as '0'. It is not
expected that these bits be written to anything
other than 1h, but limited adjustment is allowed.
These bits should be written to support the system
implementation. These bits should always be
written to a non-zero value.
Reserved
These bits are always read as 0. The write value
should always be 0.
NoOverCurrentProtection
USB Host Controller implements global over-
current reporting
0: Over-current status is reported
1: Over-current status is not reported
This bit should be written to support the
external system port over-current
implementation.
Rev. 1.00 Oct. 01, 2007 Page 1480 of 1956
REJ09B0256-0100